Phase synchronisation loop (PLL) - definition
Phase synchronisation loop (PLL) - definition
The Phase-Locked Loop (PLL) is an electronic circuit used to synchronise the frequency and phase of an output signal with a reference signal. It works on the principle of feedback, in which the phase difference between the two signals is converted into a control signal, used to adjust a voltage-controlled oscillator (VCO) generator so that its frequency and phase correspond to a reference signal.
The basic components of the PLL are a phase detector, a low-pass filter, the aforementioned VCO generator and a feedback circuit. The phase detector compares the reference signal with the generated signal and produces an error signal proportional to their phase difference. This error signal is filtered and routed to the input of the VCO, which adjusts its frequency until the phase difference disappears - indicating that a synchronised state has been reached.
The PLL is used in many areas of electronics, including telecommunications systems, frequency converters, clock circuits, FM demodulators, timing generators and frequency synthesisers. Its ability to maintain precise synchronisation with a reference signal makes it an essential component in digital systems where stabilisation and propagation of clock signals is required.
The PLL circuit can operate in frequency tracking mode, where it dynamically adjusts to changing reference signal conditions, or in fixed synchronisation mode, where it maintains a fixed frequency relationship. Loop parameters such as frequency response and rise time, depend on filter characteristics and VCO properties, requiring careful design, especially in applications requiring high precision and low phase noise.
From the point of view of control theory and signal processing, the PLL is a non-linear system that can exhibit complex dynamic phenomena, including transients, capture phenomena and loss of synchronisation, and its stability depends on proper tuning of the loop elements.
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